FPGA Project: ADC → FFT → UART

This project reads analog signals using an ADC, performs FFT on the digital data in real time using FPGA, and sends the frequency-domain results to a PC via UART (serial port).

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Project Overview

Flow Diagram

scss

Analog Signal
     ↓
[ ADC (e.g., SPI/I2C) ]
     ↓
[ FPGA ]
 ├─ Input Buffer
 ├─ FFT Core (Radix-2, 64 or 128 points)
 └─ UART Transmitter
     ↓
PC Terminal (Plot FFT data)

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Hardware Requirements

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Functional Blocks

1. ADC Interface (SPI or Parallel)

• Connect ADC to FPGA.

• Sample signal at regular intervals.

• Store N samples (e.g., 64 or 128) in a buffer.

Example: MCP3008 (10-bit SPI ADC)
Use SPI master FSM to read values and convert to 16-bit fixed-point numbers.

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2. FFT Core (Custom or IP Core)

• Use pipelined or iterative Radix-2 FFT.

• Can be:

  • Xilinx FFT IP (Vivado)

  • Open-source FFT HDL core

• Input: N samples (real only; imaginary = 0)

• Output: Complex frequency bins (magnitude or raw)

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3. Magnitude Calculation (Optional)

• Compute |X(k)| = √(Re² + Im²)

• Use CORDIC or approximation (e.g., abs(Re) + abs(Im)/2)

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4. UART Transmitter

• Transmit FFT output (e.g., 64 magnitudes) at baud rate like 115200

• Packet structure: Start byte → data → Stop byte

verilog

// UART byte-wise output FSM
always @(posedge clk) begin
  case (state)
    SEND_START: tx_data <= 8'hAA;
    SEND_DATA: tx_data <= fft_result[counter];
    SEND_END: tx_data <= 8'h55;
  endcase
end

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Implementation Tips

FFT Word Length

• Use fixed-point (e.g., Q1.15) to save logic

• Scale down intermediate results to avoid overflow

Clock Domains

• Use clock domain crossing if ADC and FFT run at different rates

• FIFO buffer is helpful

UART Format

• Send 8-bit or 16-bit FFT magnitudes

• Add framing (start/stop byte) to avoid misalignment

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Example Output (UART Stream)

css

[0xAA] [mag_bin0_H] [mag_bin0_L] ... [mag_bin63_H] [mag_bin63_L] [0x55]

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PC-side Visualization (Python + PySerial)

python

import serial
import matplotlib.pyplot as plt

ser = serial.Serial('COM3', 115200)
while True:
    if ser.read() == b'\xAA':
        data = ser.read(128)
        mags = [int.from_bytes(data[i:i+2], 'big') for i in range(0, 128, 2)]
        plt.plot(mags)
        plt.pause(0.01)

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Summary